1. Field of the Invention
The present invention relates to a method for effecting plasma etching for semiconductor materials and an apparatus therefor. The method and apparatus according to the present invention can be used for the production of, for example, MOS type semiconductor integrated circuits.
2. Description of the Prior Art
In a parallel plate type plasma etching apparatus, semiconductor elements are usually processed using a relatively high electric power of a high frequency in order to attain fast etching speeds and good pattern edge profiles. Due to a capacitor in this case, a self-bias voltage is generated on a first electrode (for example, a cathode) on which is mounted a specimen of a semiconductor material that is to be processed. Owing to this bias voltage, ions in the plasma are accelerated and impinge upon the specimen that is to be processed; i.e., products having excellent pattern edge profiles are obtained. However, bombardment of high-energy ions often damages the specimens that are to be processed. The extent of the damage, usually, depends upon the accelerating energy. From the standpoint of achieving processing of a specimen without damage, therefore, it is desired to employ ions with a low accelerating energy. Use of ions with a low accelerating energy, however, inevitably results in a decrease of the etching speed. To overcome this and to achieve the processing without any damage but with fast etching speed. There has been proposed a particular device wherein, an intermediate electrode, which serves as a third electrode, is provided in a generally employed two electrode type plasma etching apparatus.
FIG. 1 illustrates a conventional apparatus for effecting plasma etching, having an intermediate electrode. Referring to FIG. 1, the apparatus consists of a first electrode 1, a second electrode 2, a bell jar 3, a capacitor 5, a high frequency power supply 6, and an intermediate electrode 7. The intermediate electrode 7 has a shape of a disc and the disc has through holes. A specimen 4 is located on the first electrode 1.
The above mentioned apparatus was previously invented by the inventors of the present invention. The inventors thereafter conducted further studies, and found the facts as will be explained hereinbelow in the specification of this application, thus accomplishing the present invention. Namely, with the apparatus of FIG. 1, the plasma density increases between the first electrode and the intermediate electrode and, hence, a high etching rate is realized even at a low self-bias voltage, and damage due to processing can be reduced. Such effects are greatly dependent upon a gap between the intermediate electrode and the first electrode, and are particularly striking when the gap is small. When, for example, SiO.sub.2 is to be processed for contact hole formation, however, a preferential etching of SiO.sub.2 to the underlying silicon cannot be performed. As the gap between the intermediate electrode and the first electrode increases, on the other hand, the mode of discharge becomes similar to that of the two electrode type apparatus, whereby the self-bias voltage is increased and the processing causes increased damage. The selectivity of etching to the underlying silicon, however, is increased. According to the conventional apparatus in which the position of the intermediate electrode is fixed, it is not possible to maintain high selectivity while minimizing the damage due to the processing.
The present invention is proposed in order to solve the aforementioned problems inherent in the conventional art.
The above mentioned conventional etching apparatus has been disclosed in Japanese Patent Application No. 111257/78 (Japanese Patent Laid-Open No. 38043/80) that was filed by the inventors of the present invention.